A voltage-level converter converts a logic signal at a first voltage level to a logic signal at a second voltage level. In a modem integrated circuit, such as a microprocessor, a digital signal processor, or an application specific integrated circuit, different voltage levels, such as a first supply voltage level and a second supply voltage level, provide power to different groups of circuits to reduce the overall power consumption in the integrated circuit. However, signals generated by circuits powered at a first supply voltage level are usually incompatible with circuits powered at a second supply voltage level. Therefore, signals generated by circuits powered at a first supply voltage level are converted to signals compatible with circuits powered at a second supply voltage level by inserting a voltage-level converter between the circuits powered at the first supply voltage level and the circuits powered at the second supply voltage level.
FIG. 1A is a schematic diagram of a prior art voltage-level converter 100. The voltage-level converter 100 includes transistors 102-105 having threshold voltages that are about equal. The voltage-level converter 100 converts a logic signal at a first logic voltage level (VCC1) at the node 107 to a logic signal at a second logic voltage level (VCC2) at the node 109. Unfortunately, if the logic signal at the first logic voltage level (VCC1) does not cause the transistor 102 to enter the cut-off region of operation, the conversion of a logic signal from the first logic voltage level (VCC1) at node 107 to the second logic voltage level (VCC2) at node 109 can cause the voltage-level converter to consume power. Furthermore, as the difference between the first voltage level (VCC1) and the second voltage level (VCC2) increases, the voltage-level converter 100 increases its static power consumption. Thus, even though the voltage-level converter 100 provides relatively fast voltage level conversion when compared with other voltage-level converters, the voltage-level converter 100 can consume power for static inputs and is not well suited for applications that require low power consumption.
FIG. 1B is a schematic diagram of a prior art voltage-level converter 110. The voltage-level converter 110 includes transistors 114-117 and inverter 119. The transistors 114-117 have threshold voltages that are about equal. After a low-to-high voltage transition at the input node 112, the first cross-coupled pull-up transistor 114 is turned off, the second cross-coupled pull-up transistor 115 is turned on, the transistor 116 is turned on, and the transistor 117 is turned off. With the transistors 114 and 117 turned off, there is no direct current path through the voltage-level converter 110, and the voltage-level converter 110 consumes substantially zero power. However, during a low-to-high voltage transition at the input node 112, there is contention at nodes 122 and 124, and this contention increases the delay and the dynamic power consumption of the voltage-level converter 110.
Therefore, even though the voltage-level converter 110 consumes substantially zero power for static voltage level inputs, the performance (speed) of the voltage-level converter 110 is relatively low, and the voltage-level converter 110 consumes power during voltage transitions.
For these and other reasons there is a need for the present invention.